Paper first presented at VOICE 2007, Dec. 4, 2007

Abstract

Applications requiring a very low phase noise reference clock signal to be applied to the DUT for certain measurements are often a big challenge for today’s ATE. This paper outlines why low phase noise clocks are necessary. It discusses the possible solutions that exist on the V93000 along with their pros and cons.

A common approach is the use of an on-board crystal for lowest phase noise clock generation. This approach has numerous disadvantages, the major one being that it is not synchronized with the tester hardware. This potentially makes some measurements like RF transmitter phase noise or error vector magnitude (EVM) quite difficult and sometimes nearly impossible.

Verigy addresses this by introducing the Port Scale Pure Clock. Technical details of the Port Scale Pure Clock are given and performance measurement results are presented together with a detailed comparison with other approaches for reference clock generation.

Read entire paper.