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Summary

Lowest cost of testing Flash with the flexibility to test DRAM, SRAM and stacked memory devices

For traditional manufacturers of NOR and NAND Flash devices, the V5400 offers a dramatic reduction in the Cost-of-Test for Flash wafer sort. It also provides increased parallelism and configuration flexibility for manufacturers who must test an increasingly complex mix of memory devices. The V5400 is designed to meet all of today's memory test challenges head-on: it has the ability to test Flash, DRAM, SRAM and stacked memory devices; it offers greater parallelism with up to 4608 I/O channels; and it has the flexibility to be configured with up to 144 sites per system.

• Continues to lower the cost of memory test
  With the introduction of each new test system, Verigy drives down the cost of memory test, year after year. The V5400 continues the tradition of providing cost-effective test for a wide mix of memory devices, while dramatically lowering the cost of Flash wafer sort.
• Flexible architecture tests a wide a mix of memory devices
  The new Dynamic APG enhances Verigy's Tester-per-Site architecture and enables the V5400 to cover the full spectrum of test methodologies including BIST, reduced-pin-count NAND and NOR, DRAM, and full-pin count NAND and NOR.
• Single platform performs both wafer test and final test
  The V5400 provides both wafer sort and final test for manufacturers of Flash NOR, Flash NAND, and stacked memories.