Verigy and Cadence Present Seminar Series on Optimized Solutions for Yield Analysis & Learning in Semiconductor Manufacturing

CUPERTINO, Calif. – May 27, 2008 – Verigy (NASDAQ: VRGY), a leading semiconductor test company, and Cadence Design Systems, Inc., a leader in global electronic-design innovation, are hosting a seminar series for semiconductor designers and manufacturers on how to improve product yield economics.

This series of half-day seminars will include presentations by Cadence and Verigy representatives on technologies and techniques for yield learning that optimize data gathering for improved throughput and accuracy of diagnosis, as well as provide methods to address yield issues earlier in the process. Product engineers and failure analysis engineers will gain valuable insight on techniques for enabling fast product ramps, while engineering managers and executives will learn how to improve cost reduction through yield learning.

"With the recent addition of Inovys yield learning tools, Verigy's test solutions now provide valuable, actionable information that can inform the design process to increase entitled yield," said Debbora Ahlgren, vice president and chief marketing officer, Verigy. "This seminar is an exciting opportunity for us to collaborate with one of the leaders in electronic design automation to provide our joint customers with practical information for increasing yield."

"Cadence has an expansive portfolio of design for manufacturing solutions with a strong focus on post-silicon diagnostic and analysis," said Nitin Deo, DFM group marketing director at Cadence. "As this seminar series demonstrates, partnering with Verigy allows us to optimize our DFM flow to better serve our mutual customers so they can begin implementing this powerful architecture in their own environments."

Dates and Registration
The seminar will be held in the following U.S. locations during June:
  • June 17 – San Jose, Calif.; Cadence Headquarters
    Pebble Beach Auditorium, Building
    2655 Seely Avenue
    San Jose, California 95134
    408.943.1234

  • June 19 – Austin; Cadence Austin Office
    Trinity River Conference Room
    4516 Seton Center Parkway, Suite 300
    Austin, Texas 78759
    Phone: 512.349.1100

  • July 16 – SEMICON West
    Moscone Center
    747 Howard Street
    San Francisco, CA
    415.974.4000
    (www.semiconwest.org)

The seminar will also be presented this summer in Japan; details will be posted on www.cadence.com and www.verigy.com.

To register for a seminar please visit www.verigy.com/go/events or call 1-866-ATE-TEST

About Verigy
Verigy designs, develops, manufactures, sells and services advanced test systems and solutions for the memory and system-on-chip segments of the semiconductor industry. Verigy's scalable platform systems are used by leading semiconductor companies worldwide in design validation, characterization, and high volume manufacturing test. Formerly part of Agilent Technologies, the company began doing business as Verigy on June 1, 2006, and completed its initial public offering on June 13, 2006. Information about Verigy can be found at www.verigy.com.


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