The Verigy V5500 is a complete final test solution that addresses the complex test challenges faced by manufacturers of MCP and discrete Flash memory devices. The V5500 leverages Verigy's industry-leading memory test expertise into final test, continuing the tradition of breakthrough cost-of-test solutions. The tester-per-site architecture of the V5500, combined with the Verigy Programmable Interface Matrix technology, optimizes single insertion testing of MCPs with multiple memory types (including Flash, DRAM and SRAM) resulting in industry leading tester utilization and throughput.

With the V5500, manufacturers of single- and multi-memory devices reap considerable savings relative to capital investment, consumable expenses, test time reduction, floor space and reliability, over traditional multi-insertion or other high pin count testing alternatives.

The V5500 also provides unmatched parallelism for testing discrete NAND and NOR Flash devices at final test. When set to High Parallelism mode, the Matrix enables testing of x320 NAND and x768 NOR devices to fully utilize today's leading edge handlers.

The V5500 is designed to meet today's and tomorrow's MCP and high-parallelism final test challenges head-on.

V5500 Matrix Demo  

Product Overview     1.79MB