| 2.2Gbps APG and I/O Data Rate |
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Allowing at-speed test for ensured device quality, highest revenue from yield due to superior speed binning performance and yield of top speed bins, as well as fast yield learning |
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| Future-ready upgradeability to higher data rates |
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Unique return on investment and lifetime value. |
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| 64x sites parallelism for 8x organized DDR3 in a single test-head; Upgradeable to 128x sites parallelism |
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Best parallelism and highest efficiency in this speed class resulting in superior cost-of-test |
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| True 2.2Gbps test at single pass/strobe |
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Avoids "double clocking" or "pin muxing". Lowest test time and best test coverage and yield. |
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| Per-pin timing |
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Recovery of timing margins for highest yields. |
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| Lowest Timing Jitter and lowest skew |
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Repeatable, reliable and accurate timing test for highest yields |
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| Most Flexible pin electronics, highest bandwidth |
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Flexibility in manufacturing to address other DRAM/SRAM technologies. Investment protection |
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| At-speed failure capture per-site and Bit-Fail-Map (BFM) |
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At-speed capture of failure data at all sites in parallel to enable yield learning in production, without extra hardware cost |
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| Non-interleaved, at-speed per-pin APG, including refresh |
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Offers most complex memory test patterns to ensure required test quality and fast yield learning |
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| Source Synchronous |
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Recovery of timing margins for higher yields. |
