Consumer demand for more capability and connectivity in a single product is driving the need for more functionality, faster processing and higher speed
interfaces in next-generation System-on-a-Chip (SOC) and System-in-Package (SIP) devices. To test these devices, a test system must have the capability
to address a range of performance challenges: structural test requirements, rising processing speeds for logic cores, different interfaces and more. And this
must all be done at a lower costof-test than last year because of ongoing price erosion. An uncertain future demands the ability to upgrade quickly to meet the
next performance challenge while continuing to reduce cost-of-test.
