Test Technology Library




Learn from Verigy experts about the latest industry trends, challenges, methodologies, and our products.

Access over 60 technical papers, and be notified by email as new papers are added. Don't miss out on keeping up to date with the newest technical trends!

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Sample Papers  

A Method to Generate a Very Low Distortion, High Sine Waveform Using an AWG  
Published October 28, 2008, by Akinori Maeda, International Test Conference 2008, Paper 22.1 1-4244-4203-0/08/.  View Abstract

Real-Time Signal Processing ― A New PLL Test Approach 
Published 28-Nov-2007, by Hideo Okawara, at International Test Conference 2007, November 28-29, 2007, Paper 16.1, 1-4244-1128-9/07.   View Abstract

Comparison of Measurement Method by Analog and Digital Resource for High Speed Serial Interface 
Published 09-Dec-2005, by Takashi Ito at the Semi Technology Symposium in Semicon Japan 2005, Proceedings, 7-9 December 2005.  View Abstract

Analysis of Pseudo-Interleaving AWG 
Published 08-Nov-2005, by Hideo Okawara at the Test Conference 2005, Proceedings, International, 8-Nov. 2005, Pages: 1174 - 1181.  View Abstract

Low-Cost Analog Signal Generation Using a Pulse-Density Modulated Digital ATE Channel 
Published 17-Nov-2004, by Jochen Rivoir at the Test Symposium, 2004, 13th Asian, Vol., Iss., 15-17 Nov. 2004, Pages: 290 - 295.  View Abstract

Precise Pulse Width Measurement in Write Pre-Compensation Test 
Published 28-Oct-2004, by Hideo Okawara at the Test Conference, 2004, Proceedings, International, 26-28 Oct. 2004, Pages: 972 - 979.  View Abstract

Single SOC Test Challenge for Blu-Ray DVD 
Published 06-May-2004, by Don Blair and Keita Gunji at Semicon Singapore, May 4-6, 2004.  View Abstract

Mixed-Signal LSI Relationship Among Measurement Accuracy, Yield, and Test Time 
Published 25-Apr-2004, by Hideo Kohinata, et al. at the Workshop on Current and Defect Based Testing, 2004, DBT 2004, Proceedings, 2004 IEEE International Workshop on 25 April 2004, Pages: 43 - 45.  View Abstract

Practical Design Methodologies that Enable Concurrent Testability of Multiple Analog and Digital Modules in SOC Devices and Provide Significant Reusability of ATE Test Vendors 
Published 20-Apr-2004, by Jeff Brenner at Semicon Europa EMTC in Munich on April 20, 2004.

Technical and Economic Requirements of Integrated SOC Testing 
Published 18-Jul-2003, by Don W. Blair at the Electronics Manufacturing Technology Symposium, IEMT 2003, IEEE/CPMT/SEMI 28th International, 16-18 July 2003, Pages: 215 - 219.  View Abstract

Frequency/Phase Movement Analysis by Orthogonal Demodulation 
Published 10-Oct-2002, by Hideo Okawara at the Test Conference, 2002, Proceedings, International, 8-10 Oct. 2002.   View Abstract